摘要
在进行低电压低功耗模拟电路设计的众多技术中,衬底驱动(BD)技术由于设计简单和使用传统MOS工艺实现的特点,而被很多的设计所采用。本文利用这一原理,在标准CMOS工艺和±0.7V电源电压前提下设计低电压低功耗标准模块,最后在TSMC0.25μmCMOS工艺模型下,用Spice模拟器验证了模拟仿真结果。
Among many techniques used for the design of LV-LP analog circuits, the Bulk-driven principle offers a promising route towards this design for many aspects mainly the simplicity and using the conventional MOS technology to implement these designs. This paper is devoted to the Bulk-driven(BD) principle and utilizing this principle to design LV LP building blocks in standard CMOS processes and supply voltage ±0.7V. The simulation results have been carried out by the Spice simulator using the 0.25 um CMOS technology from TSMC.
出处
《微型机与应用》
2011年第24期18-19,22,共3页
Microcomputer & Its Applications
基金
国家自然科学基金项目(60801042)