65nm SRAM传统静态指标的测试方案及研究

The Study and Test Method of SRAM Conventional Static Characteristics in 65 nm Process Technology

65nm及其以下工艺,工艺波动对SRAM性能影响越来越大。SRAM读写噪声容限能够反映SRAM性能的好坏,对于预测SRAM良率有着重要的作用。采用一种新型测试结构测量SRAM读写噪声容限(即SRAM传统静态指标),该测试结构能够测量65nm SRAM在保持、读、写三种操作下的指标:Hold SNM,RSNM,N-curve,WNM。为了解决其它测试方法存在的测试工作量大和IR drop(压降)等问题,该测试结构采用四端结构引出SRAM的内部存储结点,通过译码器选中特定的SRAM单元进行测试,解决了端口复用问题。提出的测试结构已在SIMC65nm CMOS标准工艺上流片验证,并测得相应数据。

Process variations have induced growing influence on the SRAM performances in the technology of 65 nm and below. SRAM read and write noise margins can reflect the SRAM performances, which are crucial for estimating yield of SRAM arrays. A new test structure is employed to obtain the 65 nm SRAM read and write noise margins. The structure can measure the SRAM conventional static characteristics in standby, read and write modes, respectively. These characteristics are named SNM, RSNM, N-curve and WNM. To overcome the disadvantages of heavy workload and IR drop during test in previous methods, the new test structure exploits 4- terminal to wire out the SRAM internal nodes, and also a decoder is utilized to activate the particular SRAM cell for test. With these static characteristics, 65 nm SRAM performance can be studied. The designed structure has been fabricated in SIMC 65 nm CMOS process,and the corresponding test data have been got.