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多通道并行访问模式下的闪存静态损耗均衡设计

Static wear leveling design of flash memory in multi-channel parallel access mode
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摘要 静态损耗均衡算法决定了固态闪存存储系统的使用寿命。为了提高多通道并行访问模式下的闪存系统寿命,提出了一种主动搬移静态数据的静态损耗均衡设计。该设计在多通道并行访问模式下,根据擦除标志位,采用轮询法主动挑选静态数据块并加入待擦除块队列,从而减小各物理块之间的损耗不均衡程度。实验结果表明:该设计能提高平均擦除次数至少8.33%,有效降低并行访问模式下的损耗不均衡程度至少5.39%。该文还对影响损耗均衡程度的触发阈值进行了分析,提出了在选择触发阈值时,需要综合考虑损耗均衡情况和系统速度。 Static wear leveling algorithms are used to determine the lifetime of solid-state flash memory storage systems. The lifetime of flash memory in the multi-channel parallel access mode can be prolonged by a static wear leveling design that proactively moves static data. The design actively picks out blocks with static data using a polling method based on the erase flag and adds them to the block queue to be erased to level the wear on different physical blocks. Tests show that the design increases the average number of erase cycles by at least 8.33%, which effectively levels the wear even in the multi-channel parallel access mode by at least 5.39%. The effect of the trigger threshold on the wear leveling is analyzed to show that the wear leveling and system speed must be balanced in designes.
出处 《清华大学学报(自然科学版)》 EI CAS CSCD 北大核心 2011年第11期1706-1710,共5页 Journal of Tsinghua University(Science and Technology)
基金 东莞市重点项目(200910814003)
关键词 闪存存储系统 静态损耗均衡算法 多通道并行访问 触发阈值 flash memory storage systems static wear levelingalgorithm multi-channel parallel access triggerthreshold
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  • 1Park C, Seo J, Seo D, et al. Cost-efficient memory architecture design of NAND flash memory embedded systems [C]. Proc IEEE ICCD. San Jose, USA: IEEE Press, 2003: 138-143.
  • 2CHANG Lipin, KUO Teiwei. An adaptive striping architecture for flash memory storage systems of embedded systems [C]// Proc IEEE RTAS. San Jose, USA: IEEE Press, 2002: 187- 196.
  • 3Hutsell W, Bowen J, Ekker N. Increasing Flash Solid State Disk Reliability [R]. Texas, USA: Texas Memory Systems, 2005.
  • 4Gal E, Toledo S. Algorithms and data structures for flash memories [J]. ACM Computing Surveys, 2005, 37(2) : 138 - 163.
  • 5Jung D, Chae Y H, Jo H, et al. A group-based wear-leveling algorithm for large-eapaeity flash memory storage systems [C]// CASES. Salzburg, Austria: ACM Press, 2007: 160- 164.
  • 6CHANG Yuanhao, Hsieh J W, KUO Teiwei. Endurance enhancement of flash-memory storage systems: An efficient static wear leveling design [C]// DAC. San Diego, USA: ACM Press, 2007:212-217.
  • 7CHANG Lipin. On efficient wear leveling for large-scale flash-memory storage systems [C]// SAC. Seoul, Korea:ACM Press, 2007: 1126 - 1130.
  • 8Ban A, Hasbaron R. Wear Leveling of Static Areas in Flash Memory [P]. 673222.1, USA. 2004.
  • 9Ben-Aroya A, Toledo S. Competitive analysis of flash-memory algorithms [C]// ESA. Ztirich, Switzerland: ALGO Press, 2006: 141 - 168.
  • 10Spivak M, Toledo S. Storing a persistent transactional object heap on flash memory [C]// LCTES. Ottawa, Canada: ACM Press, 2006: 22-33.

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