航天用SRAM型FPGA抗单粒子翻转设计

SEU-tolerant design of SRAM FPGA for space use

采用SRAM工艺的FPGA因其性能优异,在空间领域的应用受到重视;但是在空间环境中,SRAM型FPGA易受单粒子翻转的影响而导致逻辑故障或功能中断。文章提出对该类芯片的配置逻辑部分采用回读比较后刷新、对其BRAM部分采用通用自纠错宏的抗单粒子翻转(SEU)设计方案,在牺牲一定的器件性能的情况下,能达到较好的抗辐射效果。

SRAM FPGA is increasingly important in space use because of its excellent performance.In the space environment,however,SRAM FPGA is vulnerable to single event upsets（SEUs）,which may lead to logic faults or function interrupts.This paper proposes an SEU-tolerant design by using scrubbing after read-back comparison for the configuration logic part,and using self-correction macro for the BRAM part.This approach is shown to have satisfactory hardening effect against SEUs.