基于FPGA的高帧频CCD驱动控制系统的设计

Design of Driving Control System for High Frame Rate CCD Based on FPGA

CCD芯片的驱动电路是整个高帧频图像采集系统的核心部分,它关系到整个系统的性能和技术指标。分析并实现了DALSA公司1 M像素的帧转移型高帧频CCD芯片FT50M的内部结构和驱动时序,并采用集成芯片设计了该CCD芯片的驱动时序和所需的偏压电路,进而改进了CCD芯片的偏置电压电路,采用大多数的偏置电压由SFD信号生成的方式。因此只需产生极少偏置电压即可生成所需全部偏压,这是目前十分安全的偏压解决方案,并选用了FPGA作为核心控制器件。实验表明:此设计不仅简化了电路,还具有性能好、功耗低、体积小的优点,实现了对高帧频CCD图像采集系统的驱动控制。

The driver system of CCD is the key part of image collection system with high frame rate,which is related to performance and technical parameters of the whole system.The inner structure and the driving schedule of a frame transfer CCD device FT50M with 1 M pixels made by DALSA Corporation is analyzed and made,the special integration chips are adopted to design the driver timing and bias voltage.The bias voltage circuit is improved,the way that most of the DC bias voltages are derived from SFD is used,therefore only two DC bias supplies are needed,which is much safe solution.The system takes Field Programmable Gate Array（FPGA） as the core device.It is proved that this design not only simplify system circuit,but also possess great performance,low power consume and small volume.It can meet the demand of the CCD system in driving and controlling application.