基于FPGA的CIC抽取滤波器设计与实现

Design and Implementation of CIC Decimation Filter Based on FPGA

现场可编程门阵列(FPGA)器件广泛应用于数字信号处理领域,而使用VHDL或Verilog HDL语言进行设计比较复杂。针对软件无线电中的多速率信号处理技术,提出了一种采用DSP Builder实现级联积分梳状(CIC)抽取滤波器的FPGA实现方案。软件仿真和硬件测试验证了设计的正确性和可行性。

Field Programmable Gate Array（FPGA） devices is widely used in the field of digital signal processing,but it is complicated to design using VHDL or Verilog HDL.For the multi-rate signal processing technology in software radio,this paper porposed a scheme for implementation of Cascade Integrator Comb decimation filter based on FPGA and DSP Builder.The correctness and feasibility of the design is verified by software simulation and hardware test.