期刊文献+

A 3 to 5 GHz low-phase-noise fractional-N frequency synthesizer with adaptive frequency calibration for GSM/PCS/DCS/WCDMA transceivers 被引量:1

A 3 to 5 GHz low-phase-noise fractional-N frequency synthesizer with adaptive frequency calibration for GSM/PCS/DCS/WCDMA transceivers
原文传递
导出
摘要 A low-phase-noise E-A fractional-N frequency synthesizer for GSM/PCS/DCS/WCDMA transceivers is presented. The voltage controlled oscillator is designed with a modified digital controlled capacitor array to extend the tuning range and minimize phase noise. A high-resolution adaptive frequency calibration technique is introduced to automatically choose frequency bands and increase phase-noise immunity. A prototype is implemented in 0.13 #m CMOS technology. The experimental results show that the designed 1.2 V wideband frequency synthesizer is locked from 3.05 to 5.17 GHz within 30 μs, which covers all five required frequency bands. The measured in-band phase noise are -89, -95.5 and -101 dBc/Hz for 3.8 GHz, 2 GHz and 948 MHz carriers, respectively, and accordingly the out-of-band phase noise are -121, -123 and -132 dBc/Hz at 1 MHz offset, which meet the phase-noise-mask requirements of the above-mentioned standards. A low-phase-noise E-A fractional-N frequency synthesizer for GSM/PCS/DCS/WCDMA transceivers is presented. The voltage controlled oscillator is designed with a modified digital controlled capacitor array to extend the tuning range and minimize phase noise. A high-resolution adaptive frequency calibration technique is introduced to automatically choose frequency bands and increase phase-noise immunity. A prototype is implemented in 0.13 #m CMOS technology. The experimental results show that the designed 1.2 V wideband frequency synthesizer is locked from 3.05 to 5.17 GHz within 30 μs, which covers all five required frequency bands. The measured in-band phase noise are -89, -95.5 and -101 dBc/Hz for 3.8 GHz, 2 GHz and 948 MHz carriers, respectively, and accordingly the out-of-band phase noise are -121, -123 and -132 dBc/Hz at 1 MHz offset, which meet the phase-noise-mask requirements of the above-mentioned standards.
作者 潘姚华 梅年松 陈虎 黄煜梅 洪志良 Pan Yaohua;Mei Niansong;Chen Hu;Huang Yumei;Hong zhiliang(State Key Laboratory of ASIC&Systems Fudan University,Shanghai 201203,China)
出处 《Journal of Semiconductors》 EI CAS CSCD 2012年第1期80-85,共6页 半导体学报(英文版)
基金 Project supported by the National High Technology Research and Development Program of China(No.2009AA011605)
关键词 phase-locked loop loop stability analysis voltage controlled oscillation phase noise phase-locked loop loop stability analysis voltage controlled oscillation phase noise
  • 相关文献

参考文献11

  • 1Hegazi E, Sjoland H, Abidi A A. A filtering technique to lower LC oscillator phase noise. IEEE J Solid-State Circuits, 2001, 36(12): 1921.
  • 2Hegazi E, Abidi A A. Varactor characteristics, oscillator tun- ing curves, and AM-FM conversion. IEEE J Solid-State Circuits, 2003, 38(6): 1033.
  • 3Wilson W B, Moon U, Lakshmikumar K R, et al. A CMOS self- calibrating frequency synthesizer. IEEE J Solid-State Circuits, 2000, 35(10): 1437.
  • 4Rhee W, Song B, Ali A. A 1.1-GHz CMOS fractional-N fre-quency synthesizer with a 3-b third-order AE modulator. IEEE J Solid-State Circuits, 2000, 35(10): 1453.
  • 5Lee J S, Keel M S, Lim S, et al. Charge pump with perfect current matching characteristics in phased-locked loops. IEEE Electron Lett, 2000, 36:1907.
  • 6Shu K, Sanchez-Sinencio E, Silva-Martinez J, et al. A 2.4- GHz monolithic fractional-N frequency synthesizer with robust phase-switching prescaler and loop capacitance multiplier. IEEE J Solid-State Circuits, 2003, 38(6): 866.
  • 7Koukab A, Lei Y, Declercq M J. A GSM-GPRS/UMTS FDD- TDD/WLAN 802.11 a-b-g multi-standard cartier generation sys- tem. IEEE J Solid-State Circuits, 2006, 41(7): 1513.
  • 8Lee K, Yu H, Ahn H K, et al. A 0.13-/zm CMOS E-A frequency synthesizer with an area optimizing LPF, fast AFC time, and a wideband VCO for WCDMA/GSM/GPRS/EDGE applications. IEEE RFIC, 2008:299.
  • 9Yu X, Sun Y, Rhee W, et al. A E-A fractional-N synthesizer with customized noise shaping for WCDMA/HSDPA applica- tions. IEEE J Solid-State Circuits, 2009, 44(8): 2193.
  • 10Hegazi E, Abidi A A. A 17-mW transmitter and frequency syn- thesizer for 900-MHz GSM fully integrated in 0.35 CMOS. IEEE J Solid-State Circuits, 2003, 38(5): 782.

同被引文献14

引证文献1

二级引证文献2

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部