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基于FPGA的空间矢量脉冲宽度调制发生器设计(英文) 被引量:5

Design of SVPWM generator based on FPGA
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摘要 采用自顶向下的设计方法,设计出一种新的基于FPGA的空间矢量脉宽调制发生器。通过设置逻辑判断子模块,调制发生器能有效地处理过调制。通过利用宏功能,空间矢量脉宽调制发生器的一些子模块能完成更为有效的逻辑综合与器件实现。该脉宽调制发生器的实现结构紧凑,时序逻辑简单,能方便地设置开关频率,且能灵活调整死区时间,以适用于不同的应用场合。基于MATLAB/SimPowerSystems与Altera DSP Builder的集成开发环境,设计出一个FPGA实验平台(硬件环仿真平台),并通过硬件环仿真对所设计的空间矢量脉宽调制发生器进行验证。实验结果表明了设计策略的有效性。 An FPGA-based SVPWM generator is designed with the top-down design methodology,which deals with the over modulation effectively by the logic judgment module and implements the efficient logic synthesis conveniently in its submodules by the macro functions.Its structure is compact,its timing logic is simple,and its switching-frequency and dead-time can be easily set for different applications.An FPGA experimental platform is designed based on the integrated development environment of MATLAB/SimPowerSystems and Altera DSP Builder,by which the effectiveness of the designed SVPWM generator is verified through the HIL(Hardware In the Loop) simulation.
作者 王奔 仇乐兵 徐万良 李慧 WANG Ben;QIU Lebing;XU Wanliang;LI Hui(School of Electrical Engineering,Southwest Jiaotong University,Chengdu 610031,China;Zhuzhou National Engineering Research Center of Converters Co.,Ltd.,Zhuzhou 412001,China;Guangzhou Power Supply Bureau,Guangzhou 510000,China)
出处 《电力自动化设备》 EI CSCD 北大核心 2012年第2期56-61,共6页 Electric Power Automation Equipment
关键词 SVPWM FPGA DSP BUILDER 脉宽调制 仿真 HIL SVPWM Field Programmable Gate Arrays(FPGA) DSP Builder pulse width modulation computer simulation HIL
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参考文献12

  • 1CHEN Su,JOOS G. Symmetrical SVPWM pattern generator using field programmable gate array implementation [C] JJSeventeenth Annual IEEE Applied Power Electronics Conference and Exposition. Dallas, USA : IEEE, 2002 : 1004-1009.
  • 2VAN H W,BROECK D,SKUDELNY H C. Analysis and realization of a pulse width modulator based on voltage space vector[J]. IEEE Transactions on Industry Application,1988,24 (1) :142-150.
  • 3SHU Zeliang,GUO Yuhua,LIAN Jisan. Steady-state and dynamic study of active power filter with efficient FPGA-based control algorithm[J]. IEEE Transactions on Industrial Electronics,2008,55 (4) : 1527-1536.
  • 4ZHOU Zhaoyang,LI Tiecai,TAKAHASHI,T. et al. Design of a universal space vector PWM controller based on FPGA [C ]// Nineteenth Annual IEEE Applied Power Electronics Conference and Exposition. Anaheim,USA:IEEE,2004:1698-1702.
  • 5YANG G J,ZHAO P Z,ZHOU Z Y. The design of SVPWM IP core based on FPGA[C]//The 2008 International Conference on Embedded Software and Systems Symposia. Chengdu,China: IEEE,2008 : 191-196.
  • 6HE Jiong,GAO C N,JI J C. FPGA realization of three-phase space-vector PWM[C]//Control and Decision Conference. Yantai,China: IEEE, 2008 : 3716-3721.
  • 7TZOUU Y Y,HSU H J. FPGA realization of space-vector PWM control IC for three-phase PWM inverters[J]. IEEE Transactions on Power Electronics, 1997,12(6) :953-963.
  • 8ZHOU Yuan,XU Feipeng,ZHOU Zhaoyang. Realization of an FPGA-based space-vector PWM controller [ C ]//CES/IEEE 5th International Power Electronics and MotiQn Control Conference. Shanghai, China : IEEE, 2006 : 1-5.
  • 9WANG Yinan,SCHAEFER U. Real time simulation of a FPGA based space vector PWM controller[C]//International Symposium on Power Electronics,Electrical Drives,Automation and Motion. Pisa, Italy: IEEE, 2010 : 833-838.
  • 10MUHAMADH R. Power electronics circuits,devices,and applications [M]. 3rd edition. Beijing,China:Post & Telecom Press, 2007 : 271-273.

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