FPGA和USB2.0双工接口设计

Design of Duplex Interface Between FPGA and USB2.0

为了实现FPGA与USB2.0之间稳定快速的数据传输,该设计利用USB2.0接口芯片CY7C68013的Slave FIFO模式,采用时分复用的方法设计了一种双向数据接口。在FPGA端,持续把从USB OUT FIFO读出的数据回写到USB IN FIFO,以实现系统的自环测试。该设计已被应用到超宽带(UWB)无线系统中,结果表明本接口工作稳定,数据传输准确,平均速率12Mb/s。

In order to accomplish the high-speed data transportation between the FPGA and the USB2.0,The system implement a bi-directional interface which works in the Slave FIFO mode of USB2.0 interface chip CY7C68013 and using the time division multiplexing mechanism.After the self-loop testing by writing data continuously from OUT FIFO to IN FIFO of USB under the control of the FPGA,this design has been applied to the ultra-wideband（UWB）wireless systems.The results show that the interface works stably and transfers data accurately,its average rate is 12Mb/s.