期刊文献+

双面电镀在先进封装中应用的可行性研究 被引量:1

Feasibility of Double-sided Electroplating for Advanced Packaging Applications
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摘要 在晶圆双面及孔的侧壁用一种简单的工序电沉积金属的能力,在先进封装和某些工艺中提供了一些基本的优势。双面电镀样机硬件已经过用配置垂直电镀槽的生产型ECD装置的试验。这种工艺已经成功地在几种不同的金属和多种应用中得以展示。 The ability to electrodeposit metals on both sides of a wafer and on the sidewalls of vias in a single step offers some key advantages in advanced packaging and other processes. Prototype double-sided plating hardware has been tested in a production ECD tool with vertical plating cells. This process has been successfully demonstrated for several different metals and multiple applications.
出处 《电子工业专用设备》 2012年第3期17-19,共3页 Equipment for Electronic Products Manufacturing
关键词 3D封装 硅通孔 封装体叠层 倒装芯片 双面电镀 电镀 3D packaging, TSV, package-on-package, flip chip, double-sided plating, electroplating.
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参考文献3

  • 1Pagaila et al. (StatsChipPac, Ltd.)" Semiconductor device and method of forming double-sided through vias in saw streets" U.S. Patent 7,666, 711 issued February 23, 2010.
  • 2Das et al. " Package-Interposer-Package (PIP): A Breakthrough Package-on-Package (POP) Technology for High End Electronics" 2011 Electronic Components and Technology IEEE Conference.
  • 3Tummala et al. "Impact of 3D ICs with TSV is profound but complex and costly-is there a better way?" Chip Scale Review July/August 2011.

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