针对扫描阻塞结构的测试数据压缩方案

Test data compression scheme according to scan disabling structure

分析了集成电路测试面临的测试数据量大、测试应用时间长等问题,对常用的测试压缩方法进行了介绍,并在扫描阻塞测试结构基础上,提出了对数据进行部分编码压缩的方案。在附加硬件开销很小的情况下,进一步压缩了测试数据。理论分析和实验结果都表明了本压缩方案的可行性和有效性。

This paper first analyzed some problems for integrated circuit （IC） testing such as large size of test data and long time of test application, introduced some test compression method, then proposed a coding compression scheme for parts of da- ta based on the scan disabling test structure. The coding method can compress test data by few additional hardware. Theoretical analysis and experimental results show that the proposed scheme is feasible and efficient.