AVS视频标准熵解码器VLD电路的设计与验证

Hardware Design and Verification of Entropy Decoder VLD Based on AVS Standard

基于AVS视频标准,分析了指数哥伦布算法,提出了VLD模块的硬件架构,用自定义指令实现对VLD的解码控制,用Verilog HDL进行了RTL级设计,并利用rm52j标准代码构建了C参考模型,实现了对硬件设计的验证.实验结果显示,设计的VLD模块能够满足AVS标准熵解码器的要求.

Based on the AVS video standard,Exp-Golomb algorithm is analyzed first.And then we propose a hardware architecture of VLD module,whose decoding control is realized by customized instructions.Finally,the decoder is described in RTL Verilog HDL and verified with the C-model constructed by the rm52j standard code.The experimental results show that the proposed VLD module satisfies the requirements of entropy decoder of AVS standard.