摘要
针对DSP在应用中大量的使用不同精度的小数运算,对数据运算单元进行详细设计.通过对Q15格式小数计算特点的分析,增加多精度累加型数据格式,满足乘累加过程中对于精度的要求.同时,对执行部件的时延进行分析评估后,合理的划分流水线,在满足DSP计算功能的同时,还能够达到较高的工作频率.通过典型的数字信号处理算法核心,对本设计性能进行量化分析.在TSMC 65nm的工艺条件下,其时钟频率达到500MHz.
In view of the massive use of decimal arithmetic with different precisions in the digital signal processing application,a design of the arithmetic unit will be introduced.By analyzing the characteristics of the computation with Q15 format decimals,we add the multi-precision format to meet precision request in the multiply-accumulate process.At the same time,estimating the delay of executive components,we reasonably part the pipeline to implement the computation capability and reach high frequency.With the kernel of typical digital signal processing algorithms,we quantitatively analyze the performance of arithmetic unit.Under the TSMC 65nm technological condition,it runs at 500MHz.
出处
《微电子学与计算机》
CSCD
北大核心
2012年第4期150-153,157,共5页
Microelectronics & Computer
基金
"核高基"重大专项基金资助项目(2009ZX01034-001-002-003)
