时钟网格与时钟树设计方法对比研究

Contrast research between clock mesh and clock tree design methods

基于片上偏差对芯片性能的影响,分析对比了时钟树设计与时钟网格设计,重点分析了时钟网格抗OCV影响的优点,并利用实际电路应用两种方法分别进行设计对比,通过结果分析,验证了理论分析的正确性,证明在抗OCV及时序优化时钟网格方法具有很大的优势。

Circuit delay is increasingly affected by process variations at lower technology nodes,Compare the Clock mesh technology and conventional clock tree methods and use a real circuit to validate the theory that clock mesh technology provides uniform,low skew clock distribution and most important offers better tolerance to on-chip variations（OCV） than conventional clock tree technology.