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基于FPGA的神经元相关性分析的设计与实现 被引量:1

Design and Implementation of Neural Correlation Analysis Based on FPGA
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摘要 利用Verilog HDL语言,Xilinx的ISE平台实现了神经元相关性分析的设计.首先对神经元相关性分析的理论和软件实现的方法进行了简单介绍,然后对相关性分析的主要模块进行了设计,最后用ModelSim进行了功能仿真和时序仿真,用ISE做了逻辑综合与实现以及性能分析.所选FPGA器件xc5vlx220-2ff1760逻辑资源消耗只占7%,最高时钟频率可以达到240Mhz左右.只需要48个时钟周期就可以实现两个神经元之间相关性的计算,也就是200ns.64通道的情况下需要0.4ms,而用软件实现的方法至少需要几秒的时间,这样可以对神经元之间的相关性进行实时性分析. Implementing the design of neural correlation analysis using Verilog HDL and Xilinx ISE platform. Firstly, introduce the theory and software implementation method of neural correlation analysis. And then design the main module of the correlation analysis. Finally, do the functional simulation and timing simulation using ModelSim, synthesize and implement the design based on ISE platform. Only 7% logic resources are consumed of the FPGA device xcSvlx220-2ff1760. The maximum frequency can reach 240MHz. It only needs 48 clocks to implement the correlation analysis between two neurons that is 200ns. 64 channels need 4ms. However, if use the software method, it needs some seconds at least. So, it can realize the real time neural correlation analysis.
出处 《微电子学与计算机》 CSCD 北大核心 2012年第5期119-123,共5页 Microelectronics & Computer
基金 国家自然科学基金项目(61006027)
关键词 相关性分析 神经元 FPGA VERILOG HDL correlation analysis neural FPGA Verilog HDL
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参考文献8

  • 1Michael Krumin,Inna Reutsky,Shy Shoham. Corre- lation-based analysis and generation of multiple spike trains using Hawkes models with an exogenous input[J].Frontiers in Computational Neuroscience,2010,(04):147.
  • 2Pedro Ribeiro,Jennifer Simonotto,Marcus Kaiser. Parallel calculation of multi-electrode array correla- tion networks[J].Journal of Neuroscience Methods,2009,(184):357-364.
  • 3Gaetano Giunta,Alessandro Neri. Neural Correlation Based on the IPFM Model[J].Transactions on Sys- tems Man And Cybernetics,1990,(20):262-268.
  • 4Hidekazu Kaneko,Shinya S Suzuki,Jiro Okada. Directional cross-correlation analysis of neuronal burst firing[A].Chicago USA:IEEE,1997.1425-1427.
  • 5Jakob H Macke,Philipp Berens,Alexander S Ecker. Generating spike trains with specified correlation coefficients[J].Neural Computation,2009,(21):397-423.
  • 6吴明森,李华旺,刘海涛.一种16×16位高速低功耗流水线乘法器的设计[J].微电子学与计算机,2003,20(8):151-153. 被引量:3
  • 7Yamin Li,Wanming Chu. A new non-restoring square root algorithm and its VLSI implementations[A].Austin,Texas,USA:IEEE,1996.538-544.
  • 8胡学良,张春,王志华.开方运算单元的高层次综合设计[J].微电子学与计算机,2005,22(8):36-38. 被引量:1

二级参考文献12

  • 1A.D.Booth. "A signed binary multiplication technique," J.Mech.Appl..Math.,vol.4,pp.236-240,1951.
  • 2J.Fadavi Ardekani, "M×N Booth encoded Multiplier Generator Using Optimized Wallace Trees," IEEE Transactions on Very Large.Scale Intergration(VLSI) System", vol.1.No.2,June 1993.
  • 3C.S.Wallace. "A suggestion for fast multipliers," IEEE Trans.Electron.Comput.,vol.EC- 13,pp. 14-17,Feb. 1964.
  • 4I.S. Abu-Khater, A.Bellaouar,and M.I.Elmasry. "Circuit Techniques for CMOS Low-Power High-Performance Multipliers," IEEE Journal of Solid-state circuits,vol. 31.No. 10.pp. 1535-1539,Oct. 1996.
  • 5F.Lu and H.Samue, "A 200-MHz CMOS pipelined multiplier_accumulator using a quasi--domino dyn-amic full-adder cell design," IEEE J.Solid-state circuits,voL28,pp.123-132,Feb. 1993.
  • 6K.Hwang, "Computer arithmetic: principles,architecture,and design," John Wiley and Sons,1979.
  • 7John L Hennessy and David A Paherso "Computer Organization & Design The Hardware/Software Interface" 机械工业出版社 1999.
  • 8Ercegovac M D, Imbert L, Matula D W, et al. Improving Goldschmidt Division, Square Root and Square Root Reciprocal. Computers, IEEE Transactions on, July 2000, 49(7): 759-763.
  • 9Pineiro J A, Bruguera J D. High-speed Double-precision Computation of Reciprocal, Division, Square Root, and inverse Square Root. Computers, IEEE Transactions on, Dec.2002, 51(12): 1377-1388.
  • 10M D Ercegovac, T Lang. Module to Perform Multiplication,Division, and Square Root in Systolic Arrays for Matrix Computations. Journal of Parallel and Distributed Computing, 1991, 11: 212-221.

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