摘要
提出了一种以CPLD芯片作为控制核心的智能报警系统。系统主要通过检测电路、DTMF拨号电路、VHDL语言编写的逻辑硬件电路实现报警。利用EDA技术进行系统设计,外围器件少,结构简单,升级和维护方便。通过逻辑仿真,验证了系统设计的可行性和稳定性,具有实用价值。
A CPLD chip as the core of the intelligent control alarm system. Mainly through the detection circuit, DTMF dial- up circuits, logic hardware circuit in the VHDL language to achieve alarm. EDA technology for system design, peripheral devices, simple structure, upgrade and maintenance convenience. By logic simulation to verify the feasibility and stability of the system de- sign has practical value.
出处
《电子技术应用》
北大核心
2012年第5期94-97,共4页
Application of Electronic Technique
