宽带数字下变频器的一种新的高效实现结构

A Novel Efficient Digital Downconversion Structure

宽带数字下变频器是数字接收机的关键技术之一。将多相滤波应用到数字下变频器中,提出一种新的高效的实现结构。在这个结构中,抽取被移到混频和滤波之前,而内插位于最后。这种结构减少了硬件开销,降低了运算复杂性,提高了效率,同时还实现了对输入信号的带宽匹配接收。最后对该方法进行了仿真分析,结果表明:该方法计算复杂度低,非常适用于FPGA实现,有利于接收机的软件化。

Wideband digital downconversion is the key technology of digital receiver. A novel efficient digital downconversion structure is presented based on polyphase filter.In this structure, decimation is carded out before mixer and filter, interpolation is at the end. It reduces hardware cost, decreases computation complex and arise the efficiency. It also realize the matched bandwidth receiving of input signal. At last this method is simulation. The result indicates： computation complex of this method is very low and it is adaptive to FPGA implementation and the software of receivers..