高阻硅衬底MOS结构共面波导的偏压特性

DC bias characteristics of MOS-structure coplanar waveguides on high-resistivity silicon substrates

提出一种新型高阻硅(电阻率ρ>8kΩ.cm)衬底MOS(metal-oxide-semiconductor)结构的凸起式共面波导。给出了其在50MHz～40GHz频段的插入损耗和回波损耗测试结果,以及在-40V～+40V直流偏压下散射参数的变化。结果表明,随着偏压的变化,回波损耗在Ka波段极值点的频率和幅值均会产生偏移,插入损耗极值点的频率基本没有偏移,只存在幅值偏移。共面波导的损耗偏移与MOS结构的Si-SiO2界面效应有关,在凸起式共面波导损耗的偏压实验中,观察到与传统MOS结构共面波导相反的曲线,并尝试给出了理论解释。该文设计的共面波导在35GHz下实现了小于-0.010dB/mm的损耗,优于Ka频段硅衬底共面波导已报道的结果。

A metal-oxide semiconductor （MOS） structure was developed using raised coplanar waveguides （CPW） fabricated on a high-resistivity silicon （HRS） substrate with a resistivity p〉8 kΩ·cm. The insert and return losses of the CPW lines were measured from 50 MHz to 40 GHz with the scattering parameters also characterised with DC biases of from - 40 V to ＋ 40 V. The results show the frequency and amplitude of the maximum return losses, as well as the amplitudes of the maximum insert losses and the drift with the bias within the Ka band, No frequency drifts of the insert losses were found for different DC biases. The loss variations with the bias are due to the Si-SiO2 interface effect. The loss-bias curve of this CPW is very different from that of a traditional MOS CPW, which is explained theoretically. The CPW lines achieve an attenuation coefficient lower than is the best known result for suhstrates in the Ka-hand. 0. 010 dB/mm at 35 GHz, which eoplanar waveguides on silicon