一种基于FPGA的EIT电流源和数字解调方法

Current source and digital demodulation technique in EIT system based on FPGA

目的依据数字化电阻抗断层成像（EIT）硬件系统的要求，构建了基于现场可编程门阵列（FPGA）的通用型EIT硬件实验平台，完成了直接数字频率合成（DDS）的电流源和数字解调方法研究。方法实验平台以FPGA芯片为核心，集成了DDS模块、D／A及A／D接口模块、数字解调模块和RS．232数据通信等模块。结果电流源可在6．1。390．6kHz范围输出多频激励信号，输出阻抗大于190k12，电流峰峰值为2mA。数字解调模块可同时提取被测阻抗的实部和虚部信息。结论采用生物组织等效模型进行的模拟测试验证了本研究系统工作的有效性，为实用化EIT系统的建立奠定了基础。

Objective A general experiment platform of electrical impedance tomography（EIT） based on field programmable gate array（FPGA） was designed to meet the requirements of EIT digital measurement. A digital current source and the research on digital demodulation method was completed. Methods For construction of the experiment platform, DDS module, D/A and A/D interface module, digital demodulation module and RS-232 communication module were all integrated in one FPGA chip. Results The source can provide multi-frequency excitation signals of 2 mA in the range of 6.1-390.6 kHz. The output impedance of the source was higher than 190 kΩ. Both the real and the virtual information of measured impedance could be extracted. Conclusion Measurements based on bioimpedanceequivalent circuit model verified the validity of the platform. The research results of this paper provides a foundation for the construction of a practical EIT system.