摘要
通过采用数字逻辑函数对并行输出M序列产生电路进行分析和探讨,说明高速M序列的产生原理,并通过其在数字通信设备SDH中的应用介绍了并行输出M序列电路的优点。
By using digital logic function,this article analyses and disucsses the circuit that generate parallel output M-sequence,and indicates the principle of high speed M-sequence generation. In addition,the advan- tages of the circuit are introduced with the application of SDH equipment that ueses the circuit.
出处
《电气电子教学学报》
2000年第1期30-31,共2页
Journal of Electrical and Electronic Education
关键词
CMOS工艺
高速M序列
并行输出M序列
SDH
series output M-sequence
parallel output M-sequence
SDH system
parallel scrambler