LTE中咬尾卷积编码器的VHDL设计

VHDL Design of Tail-Biting Convolution Encoder in LTE System

咬尾卷积码编码具有不要求传输任何额外比特的优点,成为LTE通信系统中重要的编码方式。在介绍LTE物理信道结构的基础上,分析了咬尾卷积码编码器的编码原理,设计了咬尾卷积编码器的工作时序,然后基于Quartus-Ⅱ平台对咬尾卷积码编码器进行了VHDL设计,并利用Modelsim进行了波形仿真与验证。结果表明:采用VHDL设计方法实现咬尾卷积码编码具有设计灵活、修改方便的特点,能满足LTE通信系统的编码要求。

Tail-biting convolutional code requires no transfer of additional bits and thus becomes a very important coding pattern in LTE communication system. Based on introduction of LTE physical channel structure, the coding principle of tail-biting convolutional encoder is analyzed, the working timing of tail-biting convolutional encoder designed, and then VHDL design of tail-biting convolutional encoder on Quartus-II-based platform also done. Meanwhile, the wave simulation and verification with Modelsim indicates that the VHDL design method for achieving tail-biting convolutional codes is flexible in design and convenient in scheme modification, and thus could meet the coding requirements of LTE communication system.