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基于2D-Mesh结构的NOC buffer深度研究

A Research of NOC Buffer Depth Based on 2D-Mesh
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摘要 NOC(network-on-chip)设计中,最重要的问题是如何提高NOC的性能并减小延时。通讯网络中的的节点结构对NOC的性能和延时有着重要影响。而其中通讯节点虚拟通道的buffer深度尤为关键。通过NIRGAM(NOC Interconnect Routing and Ap plication Modeling)仿真器对一个基于XY路由算法的3×4的2D-Mesh结构NOC进行研究。分析结果表明:通讯节点虚拟通道的输入FIFO(First-In-Fist-Out)的buffer深度大于等于6时,NOC即得到优化。而该buffer深度为6到16时,优化效果并不理想。 In NOC design,the most impirtant problem is how to improve NOC performance and reduce delay.The infrastructure of net work tail determines system performance and cost of NOC greatly,in which the virtual channel buffer depth of tail’s input channel is one of the key design problems.The buffer depth of a 2-Dimension mesh topology NOC with odd-even routing algorithm is analyzed based on NIRGAM(NOC Interconnect Routing and Application Modeling) simulator.The analysis results reveal that NOC could be optimized when input FIFO(First-In-Fist-Out) buffer depth of virtual channel in tails is larger than 2.At the same time,the optimization is not ob viously when the value changed from 3 to 16.Then the reason has also been mentioned.
作者 潘攀 PAN Pan(School of Electronics and Information Engineering,Anhui University,Hefei 230601,China)
出处 《电脑知识与技术》 2012年第4期2415-2418,共4页 Computer Knowledge and Technology
关键词 片上网络 2D Mesh拓补结构 XY路由算法 buffer深度 通讯节点 虚拟通道 network-on-chip 2D-Mesh togology XY routing algorithm buffer depth communication node virtual channel
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参考文献4

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二级参考文献4

  • 1Wu Chang, Li Yubai, Chai Song. Design and Simulation of a TorusStructure and Route Algorithm for Network on Chip[C]//Proc. of the 7th International Conference on ASIC. Guilin, China: [s. n.], 2007.
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