摘要
叙述了变电站授时单元秒脉冲时延测量装置的工作原理,给出了时延测量装置的硬件构成,介绍了装置的复杂可编程逻辑器件(CPLD)以及ARM9软件实现方法。
The operating principle of second pulse delay measuring device in substation scribed. A scheme of the device is proposed. The software realization methods of the logic device, and 8-bit CPU are introduced. time service unit is decomplex programmable
出处
《测控技术》
CSCD
北大核心
2012年第5期92-94,共3页
Measurement & Control Technology