摘要
设计了一种多核处理系统通信机制的仿真模型,采用面向对象的设计模式对多核处理系统的互联节点、处理单元进行抽象,可快速搭建多核处理系统的硬件架构,支持不同互联结构和数据传输方法的仿真验证.测试结果表明,提出的仿真模型可对多核处理器中互联节点的通信能力进行精确仿真,可满足设计人员对多核处理系统硬件体系架构的性能评估需求,大幅缩短设计时间。
A communication mechanism simulation model is introduced which can quickly establish the hardware architecture for multi-core system by abstracting the processing units and interconnect points using the object- oriented design pattern, and evaluate the performance of different interconnection and data transmission mechanism. The test result shows that the model can accurately simulate the communication performance for interconnect points in multi-core system, which is helpful for the whole system performance evaluation and curtaining the hardware design cycle.
出处
《微电子学与计算机》
CSCD
北大核心
2012年第6期1-6,共6页
Microelectronics & Computer
基金
国家博士后基金资助项目(20110491091)
关键词
多核处理器
数据通信
互联节点
仿真模型
multi-core system
data communication
interconnection
simulation model