摘要
利用目前使用最为广泛的形式化验证语言VDM++在描述系统模型的语法和语义上的精确、一致的特点,结合VDMTOOLS和Rational Rose工具把UML类模型中的各个元素转化成VDM++表示,从而实现对UML类模型中所包含的各个元素进行语法和语义的检查。进一步提高UML的建模质量。
The purpose of this paper is to use the most widely used formal language-VDM ＋ ＋ that has characteristics of accuracy and consistent in describing syntax and semantic of the system model, combined with VDMTOOLS and Rational Rose tool to transform the various elements of the UML class model into representation of VI）M＋ ＋. This method achieves the various elements contained UML class model about the syntax and semantics checking, and further improves the quality of UML modeling.
出处
《微电子学与计算机》
CSCD
北大核心
2012年第6期104-107,共4页
Microelectronics & Computer
