RF905无线通信IP软核的优化设计

Optimized design of IP soft core of RF905

利用DMA数据传输方式的特点,设计了一种基于DMA方式的RF905无线通信IP软核。该IP软核基于AVALON总线,其控制和运算逻辑由一片FPGA芯片完成,适合应用于NIOSII嵌入式系统。测试与验证表明,该IP软核在传输数据时大大降低了CPU的占用时间,提高了嵌入式系统的性能并且占用较少资源,与一般的IP硬核相比,速度快,成本低,灵活性好,可移植性强,从而更能满足短距离无线通信的要求。该IP软核已应用于某无线电力参数监测系统中。

Using the characteristic of DMA, an improving IP core of RF905 is proposed. The IP core is based on AVALON bus. its control and arithmetic logic are completed on one FPGA chip so that it can be suited to NIOSII embedded system. It is proved that the IP core can reduce elapsed time of CPU greatly in data transmission process, so that the performance of NIOSII system can be improved in condition of less logical resources. The IP core is high speed, simply used, low cost, high flexibility and high portability. The IP core is tested and verified in a wireless electrical parameter monitoring system.