固体C_(70)/Si异质结的界面电子态

Interface Electron States of Solid C_(70) /Si Heterojunctions\+*

用深能级瞬态谱和高频电容 -电压技术研究了固体 C70 /Si异质结的界面电子态 .研究结果表明在 C70 /Si的界面上明显存在三个电子陷阱 Eit1( 0 .1 94)、Eit2 ( 0 .2 62 ) ,Eit3( 0 .40 7)和一个空穴陷阱 Hit1( 0 .471 ) ,以及在 C70 /Si界面附近存在着固体 C70 的电子和空穴陷阱引起的慢界面态 .结果还表明 C70 膜的生长温度对 C70 /Si的电学性质有重大影响 ,2 0 0℃生长的 C70

The interface states of solid C 70 /Si heterojunctions have been studied by both a deep level transient spectroscopy (DLTS) and a high frequency C\|V technique. Three electron traps, E it1 (0\^194), E it2 (0\^262) and E it3 (0\^407),and one hole trap, H it1 (0\^471) are observed at solid C 70 /Si interfaces. Slow electron states are also observed, which associated with deep electron and hole traps in the solid C 70 forbidden band near the C 70 /Si interface. The electronic properties of the solid C 70 /Si interfaces depend strongly on the temperature of the Si substrate during C 70 deposition, and the interface of the sample grown at 200℃ is much better than that grown at room temperature.