基于输入分解输出匹配的多态自检电路进化设计

Evolutionary Design of Polymorphic Self-checking Circuits Based on Inputs Decomposition and Outputs Matching

针对进化方法在多态自检电路设计方面存在的扩展性问题,该文提出了一种基于输入分解输出匹配的多态自检电路进化设计方法。该方法将原始电路分解为可进化生成部分和固定部分,由此减少待进化设计电路的输入个数以及适应度评价时真值表输入输出组合数量,从而降低电路进化复杂度;在适应度评价阶段,当电路输出位与理想输出匹配度小于1/2时,通过添加非门的形式提高候选电路适应度和种群多样性,防止最优结构的丢失。进化设计实验将多态门和普通门相结合,进行了两种多态自检加法器的设计。结果表明,与传统多态自检电路进化设计方法相比所提方法进化代数分别减少了47.9%和89.1%,单个测试参量下故障覆盖率分别提高了75.7%和79.7%,具有收敛速度快、扩展性好、故障覆盖率高的优点。

To solve the problem of scalability in designing polymorphic self-checking circuits using evolutionary design,a new method based on inputs decomposition and outputs matching is proposed.The system is decomposed into evolvable part and fixed part,and the number of input-output combinations can be decreased by decomposing the inputs of the system,thus the complexity of evolution is reduced.The NOT gate is added to outputs of the candidate circuits when the matching degree of the outputs is lower than 1/2 compared with desired outputs in the stage of fitness evaluation.The fitness as well as the diversity of the population is increased,and the optimum structure is protected from being eliminated.The evolutionary design experiments for two kind of self-checking adders are conducted by combining the polymorphic gates with ordinary gates.The results show that the generation of evolution is decreased by 47.9% and 89.1% while the fault coverage of single test vector is decreased by 75.7% and 79.7% compared with conventional method in designing polymorphic self-checking circuits.The proposed method enjoys advantages of faster convergence,better scalability and higher fault coverage.