高速大规模集成电路网络的快速部分高斯消元仿真方法

Fast Simulation of High-Speed VLSIC Network with Part Gauss Elimination Algorithm

提出了一种时域内含互连线的高速非线性大规模集成电路网络的快速部分高斯消元仿真方法．将电路分析改进节点导纳矩阵方程的导纳矩阵［Ｙ］中含有非线性电路元件贡献的行移到最上方的位置，由于线性元件对［Ｙ］矩阵的贡献不随时间变化，因此在每个时间采用点上只需对［Ｙ］最上方的几行实施高斯消元法．应用实例表明，部分高斯消元仿真方法具有速度快。

A fast simulation technique in time domain with part Gauss elimination (PGE) algorithm of nonlinear high speed VLSIC network with interconnects was presented. The rows, which contain the contribution of nonlinear electronic components, in the admittance matrix [Y] of modified admittance matrix (MNA) equations of circuit analysis were rearranged as the uppermost ones. Because the contribution of linear electronic components to the admittance matrix [Y] is invariant with time, Gauss elimination operation is needed only for the new uppermost rows at each time step. Examples indicate that the PGE algorithm is efficient, accurate and powerful.