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基于片上系统的GNSS兼容接收机设计与实现

Design and Implementation of GNSS Compatible Receiver Based on System on Chip
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摘要 提出了利用FPGA内的嵌入式软核NiosII代替专用DSP处理器和通用控制器,在单片FPGA内实现整个GNSS组合导航定位接收机的总体方案。分析了该模式下的快速捕获、相关器、载波跟踪环和码跟踪环算法理论与实现,给出了该组合接收机24h的静态测试结果。结果表明,该GNSS组合接收机设计满足要求。 The GNSS compatible navigation positioning receiver is implemented in a single FPGA based on the embedded software core NioslI instead of common processor and controller in DSP. The principle and implementation of fast acquisition, correlator, carder wave and code tracking loop under this mode are described in detail. The static test results of this compatible receiver in 24 hours are presented. As a result, the design of this receiver can satisfy the positioning requirements.
作者 魏敬法
出处 《现代导航》 2012年第3期171-175,共5页 Modern Navigation
关键词 导航 GNSS接收机 片上系统 NiosII嵌入式软核 Navigation GNSS Compatible Receiver System on Chip Embedded Software Core Niosll
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参考文献4

  • 1Altera Corporation. Using MicroC/OS-Ⅱ RTOS with the NiosⅡ Processor Tutorial[Z].2004.
  • 2Abdulqadir A.Alaqeeli. Global Positional System Signal Acquisition and Tracking Using Field Programmable Gate Arrays[D].Ohio University,2002.
  • 3Hun-Soo Cho. A FPGA-Based Software GPS Receiver Implementation Using Simulink and Xilinx System Generator[A].Long Beach,2005.
  • 4J.Hill. Navigation Signal Processing with FPGAs[M].San Diego,ION NTM,2004.

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