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基于硬件多线程网络处理器功耗可控无线局域网MAC协议实现

Power controllable WLAN MAC protocol implementation based on hardware multi-threaded network processor
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摘要 针对在如何在提高网络吞吐率并满足实时性需求的同时消耗更少的功耗的问题,以硬件多线程网络处理为平台,以IEEE 802.11MAC层协议为例,通过对MAC层数据流的模式、数据流上的操作行为以及时间约束进行建模并测试分析,提出一种多线程化网络协议的软件实现方法;配合动态功耗可控的多线程网络处理器能够根据流量和实时性自适应地调整系统的性能。实验结果证明,异构多线程结构程序在实时性任务时五个软件线程需四个硬件线程支持,而无实时性任务只需两个硬件线程支持。提出的多线程MAC层协议编程模型能够达到根据网络负载特征动态控制处理器性能的目的。 How to improve network throughput and meet the real-time while consuming less power process are key concerns during network processor designing.Hardware multi-threaded network processor as a platform,IEEE 802.11MAC layer protocol as an example,modeling based on MAC layer data stream model,data stream operation behavior and time constraints and test the model.This paper presented a multi-threaded network protocol software implementation method.This method could adjust system performance based on traffic and real-time with dynamic power controlled multi-threaded network processor,thereby reducing power consumption when the processor was running.The result shows that real-time tasks require 4 hard threads on multi-threaded processor while only 2 are required for non-realtime tasks.This programming model provided processors the ability to dynamically adapt network workload characteristics.
出处 《计算机应用研究》 CSCD 北大核心 2012年第7期2624-2628,共5页 Application Research of Computers
基金 国家"863"高技术研究发展计划资助项目(2008AA01Z134)
关键词 无线局域网 编程模型 实时性 低功耗 多线程 WLAN programming model real-time task low power multi-threading
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参考文献13

  • 1赵荣彩,唐志敏,邵洁.IXP 2400网络处理器低功耗技术应用研究[J].计算机工程与应用,2002,38(22):71-73. 被引量:1
  • 2YEONG J H,RAO X M,SHAJAN M R. 802.11 a MAC layer:firmware/hardware co-design[A].2003.1923-1928.
  • 3BUCAILLE I,TONNERRE A,OUVRY L. MAC layer design for UWB LDR systems:PULSERS proposal[A].2007.277-283.
  • 4FUJISAWA T,HASEGAWA J,TSUCHIE K. A single-chip 802.11a MAC/PHY with a 32-b RISC processor[J].IEEE Journal of Solid-State Circuits,2003,(11):2001-2009.doi:10.1109/JSSC.2003.818135.
  • 5CHANG Chih-yung,SHIH Kuei-ping,LEE Shih-chieh. On improving network connectivity by power-control and code-switching schemes for multihop packet radio networks[A].IEEE,2005.540-545.
  • 6SARSHAR N,REZAEI B A,ROYCHOWDHURY V P. Low latency wireless Ad hoc networking:power and bandwidth challenges and a solution[J].IEEE/ACM Transactions on Networking,2008,(02):335-346.doi:10.1109/TNET.2007.901079.
  • 7CHRISTENSENA K J,GUNARATNE C,NORDMAN B. The next frontier for communications networks:power management[J].Computer Communications,2004,(18):1758-1770.doi:10.1016/j.comcom.2004.06.012.
  • 8LEE Seong-won,GAUDIOT Jean-luc. Throttling-based resource management in high performance multithreaded architectures[J].IEEE Transaction on Computer,2006,(09):1142-1152.doi:10.1109/TC.2006.154.
  • 9AYERS J,MAYARAM K,FIEZ T S. Tradeoffs in the design of CMOS receivers for low power wireless sensor networks[A].2007.1345-1348.
  • 10YAP K S,BOEY K H. Clock gating methodology for high performance network processor in 90 nm[A].IEEE,2004.

二级参考文献9

  • 1Intel R XScaleTMMicroarchitecture Technical Summary.http://www.intel .com
  • 2Doug Burger,Todd M Austin.The SimpleScalar Tool Set[R].Version2.0,University of Wisconsin-Madison Computer Sciences DepartmentTechnical Report #1342,1997
  • 3Jun Yang,Rajiv Gupta. Energy-Efficient Load and Store Reuse[C].In:ACM/IEEE International Symposium on Low Power Electronics andDesign, Huntington Beach, CA, 2001: 72~75
  • 4John S Seng,Dean M Tullsen,George Z N Cai.Power-Sensitive Mul-tithreaded Architecture[C].In:International Conference on ComputerDesign 2000,2000:199~208
  • 5John S Seng,Eric S Tune,Dean M Tullsen. Reduceing Power withDynamic Critical Path Information[C].In:34th Annual InternationalSymposium on Microarchitecture, December, 2001:114~123
  • 6Hongbo Yang,Guang R Gao,Andres Marquez et al.Power and EnergyImpacts by Loop Transformation[C].In:Dec 2000 in Workshop onCompilers and Operating Systems for Low Power(COLP)2001,held inconjunction with Parallel Architecture and Compilation Techniques(PACT) 2001, Barcelona, SPAIN, 2001:12-01~12-08
  • 7U Kremer,J Hicks,J Rehg. A Compilation Framework for Power andEnergy Management on Mobile Computers[C].In: 14th InternationalWorkshop on Parallel Computing(LCPC'01 ),2001
  • 8C-H Hsu,U Kremer,M Hsiao. Compiler-Directed Dynamic Voltage/Frequency Scheduling for Energy Reduction in Microprocessors[C].In-ternational Symposium on Low Power Electronics and Design (ISLP-ED'01 ) ,2001:275~278
  • 9Tao Li,Chen Ding. Instruction Balance,Energy Consunption and Pro-gram Performance[R].University of Rochester,Technical Report,2001

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