摘要
针对通用串行总线(USB)全速设备中的常用时钟恢复方法存在精度差、成本高的问题,设计一种适用于USB全速设备的全数字时钟恢复单元。包含用于从USB总线数据中提取时间信息的模块,以及数字控制振荡器,能够克服因芯片工作条件不同而产生的不良影响。该设计采用全数字电路的设计流程,使用标准单元库进行逻辑综合和布局布线,设计结果满足USB协议要求。
This paper designs a kind of all-digital clock recovery unit based on USB full speed device to solve the problem that common clock recovery methods in USB full speed device are low accuracy or high cost. This clock recovery unit contains a module which can extract timing messages from USB bus data, and uses the digitally-controlled oscillator which can overcome the bad effect by the chip's different operating conditions. The design uses the all-digital circuit design processes, logic synthesis and P&R process of which is based on the standard cell library. The result of this design satisfies the USB specification's requirements.
出处
《计算机工程》
CAS
CSCD
2012年第14期231-233,共3页
Computer Engineering
关键词
通用串行总线
时钟恢复
全数字电路
标准单元库
数字控制振荡器
可重用性
Universal Serial Bus(USB)
clock recovery
all-digital circuit
standard cell library
digitally-controlled oscillator
reusability