低功耗轨到轨CMOS运算放大器设计

Design of Rail-to-Rail CMOS Low-Power Operational Amplifier

设计一种3.3V的低功耗轨到轨CMOS运放,输入级采用差分NMOS和差分PMOS共同作用,实现大的跨导。基于CSMC的0.35um 3.3V工艺模型,利用spectre软件对电路进行仿真。在电源电压3.3V,MOS管采用低开启的LVNMOS和LVPMOS,电阻负载为10K,电容负载为50pF的情况下,运放在整个共模范围内总跨导变化仅2.4%,电压增益变化仅为1.7%,直流开环增益为109dB,增益带宽积为8.4MHz,相位裕度为71,功耗为204uW。

Design of a 3.3V low-power rail-to-rail CMOS operational amplifier,the input stage of the differential NMOS and differential PMOS interaction,achieve large trans-conductance.The circuit is simulated by using CSMC 0.35urn 3.3V process model and spectre simulation software.With the supply voltage 3.3V,MOS using low open LVNMOS and LVPMOS,the load resistance 10K,and the load capacitance 50pF.The trans conductance varies only 2.4%and the voltage gain only 1.7%over the entire input common-mode range while providing a DC gain of 109dB,the unity gain bandwidth product is 8.4MHz,a phase margin of 71.The power dissipation is 204uW.