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基于导航卫星信号的采集系统设计与实现

The Design and Implementation of the data Acquisition System based on the Navigation Satellite Signal
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摘要 针对导航卫星信号监测的新要求,提出一种集成了数据采集、处理、存储和回放功能的一体化卫星信号采集系统。该系统采用PCIe架构,系统带宽可达到全双工900MB;数据采集480MB持续数据,以及480MB突发数据;数据处理采用FPGA+DSP联合架构,完成对数据实时处理;存储采用全固态结构,用Flash代替传统的磁盘存储;并且能够通过PCIe接口完成960MB带宽的数据回放。该系统具有性能高、集成度高的优点,可以运用在雷达、侦查等高端领域。 A satellite signal data acquisition system integrated with functions of data acquisition, sig- nal processing, data storage and signal playback, based on the demands of the navigation satellite signal monitoring. The system' s structure is based on PCIe and its full - duplex bandwidth can achieve 900MB ; the data acquisition module can deal with 480MB sustained data stream and exLra 480MB burst data stream; the signal processing module adopt FPGA + DSP to operate data;the data storage structure is complete solid, which replaces the traditional magnetic disk by flash array;the signal playback module playback data with bandwidth 960MB through PCIe. The system can apply for fiehls including radar and detection with the merits of high performance and high integrity.
作者 李献球
出处 《微处理机》 2012年第3期51-53,57,共4页 Microprocessors
关键词 卫星信号 数据采集 PCIe架构 一体化 Satellite signal Data Acquisition PCIe Integration
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参考文献5

  • 1刘兴旺,沈绪榜.一种片上系统(SOC)时钟同步设计方法[J].微电子学与计算机,2005,22(9):170-172. 被引量:5
  • 2颜建峰,吴宁.基于PCI总线的DMA高速数据传输系统[J].电子科技大学学报,2007,36(5):858-861. 被引量:37
  • 3Wang Sen, Tang Bin, Zhu Jim. Distributed arithmetic for FIR filter design on FPGA [ I ]. Communications, Circuits and Systems ,2007,13 ( 11 ) :620 - 623.
  • 4S Haykin. Adaptive Filter Theory, 4m edition [ M ]. Upper Saddle River, N J, Prentice Hall ,2002.
  • 5J Gray. Designing a simple FPGA - Optimized RISC CPU and system - on - a - chip[ J], Fundamental Science and Application ,2006,13 ( 1 ) : 174 - 180.

二级参考文献14

  • 1李贵山 戚德虎.PCI局部总线开发者指南[M].西安:西安电子科技大学出版社,2001.21-104.
  • 2J M Rabaey. Digital Integrated Circuits-a Design Perspective, Prentice Hall Electronics and VLSI Series, 1996.
  • 3E G Friedman. Clock Distribution Networks in VLSI Circuits and Systems. New York: IEEE Press, 1995.
  • 4Yaron Elboim, Avinoam Kolodny, Ran Ginosar. A Clock Tuning Circuit for System-on-Chip. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI)SYSTEMS, AUGUST, 2003, 11(4).
  • 5Geannopoulos G,Dai X. (1998) An Adaptive Digital Deskewing Cicuit for Clock Distribution Networks, ISSCC Digest of Techn. Papers, 4001.
  • 6PCI SIG.PCI local bus specification revision 2.2[DB/OL].http//www.Pcisig.com.,2005-06-25.
  • 7SHANLEY T,ANDERSON D.PCI system architecture[M].北京:电子工业出版社,2001.
  • 8Plx Technology.PCI 9054 data book V2.1,2000[DB/OL].http//www.plxtech.com.,2005-06-25.
  • 9袁俊气,孙敏琪,曹瑞.Verilog HDL数字系统设计及其应用[M].西安:西安电子科技大学出版社,2003.
  • 10张杰,马庭强.PCI设备配置空间的访问及实现[J].重庆邮电学院学报(自然科学版),2000,12(3):60-63. 被引量:2

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