期刊文献+
任意字段
题名或关键词
题名
关键词
文摘
作者
第一作者
机构
刊名
分类号
参考文献
作者简介
基金资助
栏目信息

基于线性频率调制与解调的片上直流电压信号放大器 被引量：1

An on-chip DC Signal Amplifier based on linear frequency modulation and demodulation
下载PDF
导出
摘要 片内直流电压信号摆幅较小,且受到CMOS工艺中被动器件一致性较差、易被高频交流信号干扰等因素的影响,采用典型的比例放大电路难以放大这类信号。为此提出了一种基于"载频"的"→→电压频率电压"放大方法,使用载波信号作为片上长距离传输的信号,将易受到干扰的直流信号局部化,利用前馈补偿技术构建了具有高度线性转换关系的"电压→频率"调制电路,采用具有较高线性度的频率解调电路实现后级电压信号的解调,有效地放大片内直流电压信号。电路仿真结果表明,所提出的放大器电路能有效地放大片上电压信号,直流电压增益为2.4。 To amplify the DC signal is a discommodious issue, because of the on-chip DC signal has such properties as little swing, less coherence and likeliness to be interfered. In light of this, a ＂voltage-frequency-voltage＂ mode DC signal amplifier is proposed, in which the frequency is the carrier signal. This amplifier is highly linear, and is equipped with a high linearity ＂ voltage-frequency＂ modulator and a ＂frequency-voltage＂ de-modulator. The simulation experimental results show that the DC signal amplifier amplifies the input voltage signal efficiently while achieving stable high linearity, and the DC gain is 2.4.
作者 马卓 潘国腾 郭阳 谢伦国
机构地区 国防科技大学计算机学院
出处 《国防科技大学学报》 EI CAS CSCD 北大核心 2012年第3期136-141,共6页 Journal of National University of Defense Technology
基金 国家自然科学基金资助项目(61076025 61070036)
关键词 片内直流电压信号 放大器 线性 频率调制 解调 on-Chip DC signal amplifier linearity frequency modulation demodulation
分类号 TN432 [电子电信—微电子学与固体电子学]
  • 相关文献

参考文献12

  • 1Shao Y L, Wang Y, Ning Z H, et al. Analysis and design of high power supply rejection LDO [ C ]//8th IEEE International Conference on ASIC, ASICON 2009, October 20 - 23, 2009,.
  • 2Wismar U, Wisland D, Andreani P. Linearity of bulk- controlled inverter ring VCO in weak and strong inversion [ C]// NORCHIP Conference, 2005 : 145 - 148.
  • 3赵振宇,郭斌,张民选,刘衡竹.一款0.18μm CMOS辐射加固差分压控振荡器[J].国防科技大学学报,2009,31(6):12-17. 被引量：3
  • 4赵振宇,蒋仁杰,张民选,胡军,李少青.差分压控振荡器中单粒子瞬变的研究[J].国防科技大学学报,2009,31(2):81-85. 被引量：5
  • 5Jan M R, Borivoje N. Digital integrated circuits--A design perspective[ M]. Prentice Hall, 2003.
  • 6Sun L Z, Kwasniewsk T A, A 1.25GHz 0.35μm monolithic CMOS PLL based on a multiphase ring oscillator[J]. Solid-State Circuits, IEEE Journal, 2001,36(6): 910-916.
  • 7Sun L Z, Kwasniewsk T A. A quadrature output voltage controlled ring oscillator based on three-stage sub-feedback loops [ C ]// Circuits and Systems, 1999. ISCAS'99. Proceedings of the 1999 IEEE International Symposium on, 1999,172:176 - 179.
  • 8Hung T B, Yvon S. Design of a high-speed differential frequency-to-voltage converter and its application in a 5GHz frequency-locked loop[ J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2008, 55 (3) : 766 - 774.
  • 9Lam Y H, Ki W H. A 0.9v 0.35m adaptively biased CMOS IDO regulator with fast transient response [ J]// Proceedings of 2008 IEEE International Solid State Circuits Conference, ISSCC, Feb 3 -7 2008, San Francisco, CA, United States, 2008 : 442 -443.
  • 10Chen H, Leung K N, A fast-transient LDO based on buffered flipped voltage follower [ C ]// Electron Devices and Solid- State Circuits ( EDSSC ), 2010 IEEE International Conference, 2010:1 -4.

二级参考文献16

  • 1Koga R, et al. Observation of Single Event Upsets in Analog Microcirenits[J]. IEEE Transactions on Nuclear Science, 1993,40(6) : 1838 - 1844.
  • 2Boulghassoul Y, et al. Effects of Technology Scaling on the SET Sensitivity of RF CMOS Voltage-controlled Oscillators[J]. IEEE Transactions on Nuclear Science, 2005, 52(6): 2426-2432.
  • 3Loveless T D, et al. A Hardened-by-design Technique for RF Digital Phase-locked Lonps[J]. IEEE Transactions on Nudesr Science, 2006, 53(6) : 3432 - 3438.
  • 4Wenjian C, et al. Impact of VCO Topology on SET Induced Frequency Response[J]. IEEE Transitions an Nuclear Science, 2007, 54(6): 2500-2505.
  • 5Wenjian C, et al. Investigation of Single-event Transients in Voltage-controlled Oscillators[J]. IEEE Transactions on Nuclear Science, 2003, 50 (6) : 2081 - 2087.
  • 6Loveless T D, et al. Modeling and Mitigating Single-event Transients in Voltage-controlled Oscillators[J]. IEEE Transactions on Nuclear Science, 2007, 54(6) : 2561 - 2567.
  • 7Hafer C, et al. SEE and TID Results for a Commercially Fabricated Radiation-hardened Clock Generator Circuit[ C]//2005 IEEE Radiation Effects Data Wolkshop, 2005.
  • 8Maneatis J G. Low-Jitter Process-independent DLL and PLL Based on Self-biased Techniques[J]. IEEE Journal of Solid-state Circuits, 1996, 31 (11): 1723 - 1732.
  • 9Chen W J, et al. Impact of VCO Topology on SET Induced Frequency Response[J]. IEEE Transactions on Nuclear Science, 2007, 54(6) : 2500 - 2505.
  • 10Chen W J, et al. Investigation of Single-event Transients in Voltage-controlled Oscillators[J]. IEEE Transactions on Nuclear Science, 2003, 50 (6) : 2081 - 2087.

共引文献6

同被引文献1

引证文献1

国防科技大学学报
2012年 第3期

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部