摘要
介绍几种常用的仿真器的设计方案,通过比较分析各自原理的优缺点,结合硬件性能,设计了基于ZWFcore的指令集仿真器ZWISS。通过对其CPU、多级存储单元、陷阱、内存管理单元(MMU)、存储保护系统(MPS)以及物理内存属性(PMA)的仿真,较完善地完成对ZWFcore的仿真。为DSP硬件评估、DSP算法实现提供了良好的软件模拟平台。
This paper gives the designs of several common simulators ,through comparing and analysis of advantages and disadvantages of their principles ,and combine the performance of the hardware ,promote the design of instruction set simulator based on the ZWFcore systerm.Through simulating the CPU,multi-level memory cell,the trap,the memory management unit （MMU）,memory protection system （MPS） and the physical memory attribute （PMA） of the simulator,give a better way to complete the ZWFcore simulation for the assessment of DSP hardware.The simulator provides a good software simulation platform for the DSP algorithm.
出处
《电子设计工程》
2012年第15期1-4,共4页
Electronic Design Engineering
基金
国家"核高基"重大科技专项(2009zx01034-001-002-003)
