期刊文献+

基于TLM2.0的硬件虚拟平台设计

Design of Hardware Virtual Platform Based on TLM2.0
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摘要 利用OVP(Open Virtual Platform)提供的模型创建基于TLM2.0的硬件虚拟平台,可以为嵌入式软件提供一个快速有效的开发环境,实现软件和硬件的协同设计。提早开发出的软件也可以对系统虚拟平台进行功能验证,分析系统性能,确定系统的最优架构。 Hardware virtual platform based on TLM2.0 is created by model provided by Open Virtual Platform(OVP). It can offer a quick and efficient development environment for embedded software, and achieve the synergie design of software and hardware. The soft wares developed early can complete the functional verification for system virtual platform, analyze the performance of the system, and ensure the optimal system architecture.
出处 《单片机与嵌入式系统应用》 2012年第8期42-44,61,共4页 Microcontrollers & Embedded Systems
关键词 TLM2.0 OVP 虚拟平台 软硬件协同设计 TLM2.0 OVP virtual platform soft and hardware synergic design
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参考文献9

  • 1李挥,陈曦.SystemC电子系统级设计[M].北京:科学出版社,2011.
  • 2童琨,边计年.片上系统设计中事务级建模技术综述[J].计算机辅助设计与图形学学报,2007,19(11):1365-1372. 被引量:6
  • 3OVP. Open Virtual Platform[EB/OL]. 1-2012 - 031. http://www.ovpworld.org/download-TLM2.0. php.
  • 4JOHN A. TLM- 2.0 User Manual]EB/OL]. [2012 - 03]. http ://www. accellera.org/downloads/standards/systemc/.
  • 5JOHN A. TLM- 2.0 User ManualEEB/OL]. [2012 - 03]. http ://www. accellera.org/downloads/standards/systemc/.
  • 6YE L, SAKIR S, JOHN M. TLM2.0 Based Timing Accu- rate Modeling Method for Complex NoC Systems[C]//Pro-ceedings of 2010 IEEE International Symposium, Paris, 2010:2900.
  • 7JOHN A. Getting Started with TLM - 2.0[EB/OL]. [2012 -03]. http://www.doulos.com/knowhow/systemc/tlm2/ tutorial-1/.
  • 8M Montoreano. Transaction Level Modeling Using OSCI TLM 2.0. pdf[EB/OL].[2012 - 03]. http://www.aceelle ra.org/downloads/standards/systemc/.
  • 9Imperas Software Limited. OVPsim Using OVP Models in SystemC TLM2. 0 Platforms. pdf[EB/OL]. [2012 - 03]. http://www.ovpworld.org/download-TLM2.0.php.

二级参考文献43

  • 1石晓郁.片上系统设计中的事务级建模方法[J].微计算机信息,2006,22(02Z):191-193. 被引量:3
  • 2Donlin A. Transaction level modeling: flows and use models[C] //Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, Stockholm, 2004:75-80
  • 3Balarin F, Passerone R. Functional verification methodology based on formal interface specification and transactor generation [C] //Proceedings of the 9th Design, Automation and Test in Europe Conference and Exhibition, Munich, 2006 : 1-6
  • 4Jindal R, Jain K. Verification of transaction-level SystemC models using RTL testbenehes[ C] //Proceedings of the 1st ACM and IEEE International Conference on Formal Methods and Models for Co-Design, Washington D C, 2003:199 203
  • 5Rissa T, Cheung P Y, Luk W. Mixed abstraction execution for the SoftSONIC virtual hardware platform[ C] //Proceedings of the 48th Midwest Symposium on Circuits and Systems, Cincinnati, 2005:976-979
  • 6Regimbal S, Savaria Y, Bois G. Verification strategy determination using dependence analysis of transaction-level models [ C] //Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications, Banff, 2004:87-92
  • 7Habibi A, Tahar S, Samarah A, et al. Efficient Assertion Based Verification using TLM [ C ] //Proceedings of the 9th Design, Automation and Test in Europe Conference and Exhibition, Munich, 2006:1-6
  • 8Klingauf W. Systematic transaction level modeling of embedded systems with SystemC [ C] //Proceedings of the 8tb Design, Automation and Test in Europe Conference and Exhibition, Munich, 2005:566-567
  • 9Cai L, Gajski D. Transaction level modeling: an overview[ C] ]] Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, Newport Beach, 2003: 19-24
  • 10Kogel T. TLM peripheral modeling for platform-driven ESL design-using the SystemC modeling library [R]. San Jose: CoWare, 2006

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