摘要
A simplified compact model for a miniaturized cross-shaped CMOS integrated Hall device is presented. The model has a simple circuit structure,only consisting of a passive network with eight non-linear resistors and four current-controlled voltage sources.It completely considers the following effects：non-linear conductivity,geometry dependence of sensitivity,temperature drift,lateral diffusion,and junction field effect.The model has been implemented in Verilog-A hardware description language and was successfully performed in a Cadence Spectre simulator.The simulation results are in good accordance with the classic experimental results reported in the literature.
A simplified compact model for a miniaturized cross-shaped CMOS integrated Hall device is presented. The model has a simple circuit structure,only consisting of a passive network with eight non-linear resistors and four current-controlled voltage sources.It completely considers the following effects：non-linear conductivity,geometry dependence of sensitivity,temperature drift,lateral diffusion,and junction field effect.The model has been implemented in Verilog-A hardware description language and was successfully performed in a Cadence Spectre simulator.The simulation results are in good accordance with the classic experimental results reported in the literature.
