HINOC系统MAC协处理器的设计与测试

Design and Test of a MAC Coprocessor in HINOC System

介绍了一种HINOC MAC层硬件加速协处理器的设计方案。首先概述了HINOC MAC层的主要功能,其次描述了MAC协处理器的主要功能、工作流程及实现方案,最后通过搭建测试平台,设计测试方案,验证了该设计能够实现以太网、HIPHY及CPU之间数据的快速搬移,达到减轻CPU处理负荷,提高HINOC端系统业务吞吐能力的预期目标。

A hardware acceleration coprocessor is presented based on MAC protocol of HINOC. First, the function of MAC protocol of HINOC is summarized; Secondly, the main function,work flow and realization scheme of the coprocessor are described;Finally, by build- ing the testing platform and designing the test scheme,the design, which has been simulated and has passed the system test, realizes fast data transmission between CPU, HIPHY and Ethernet , and the load of CPU has been reduced largely, the performance index of the HI- NOC system has realized.