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适用于多核处理器的扩展寄存器文件设计

Design of Extended Register File for Multi-core Processor
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摘要 针对处理器中可用寄存器数量有限的问题,提出一种适用于多核处理器的扩展寄存器文件设计方案。采用多组结构进行硬件设计,将通信端口映射在扩展寄存器地址空间上,以实现寄存器寻址核间通信机制,引入兼具底层指令与高层封装的混合软件配置方案,改进软件编译流程。评估结果表明,该方案将可用寄存器文件的数量增加一倍,核间通信指令数目减少50%,系统吞吐率得到优化。 Concerning the issue of limited number of register files in processor,this paper presents an extended register file design scheme for multi-core processors.A multi-bank architecture is employed for hardware design,and the communication ports are mapped in the address space of extended register file,which enables an inter-core communication method with register file direct addressing.A hybrid software configuring method is proposed with both bottom-layer instructions and top-layer packaged functions,and the compiling flow is improved.Estimation result shows this scheme can both double the number of available register files and reduce the number of instructions for inter-core communication by 50%.And the system throughput is optimized.
作者 肖瑞瑾 权衡 张家杰 尤凯迪 英彦 虞志益
机构地区 复旦大学专用集成电路与系统国家重点实验室
出处 《计算机工程》 CAS CSCD 2012年第15期283-285,289,共4页 Computer Engineering
基金 上海市科委集成电路专项基金资助项目(10706200300) 复旦大学专用集成电路与系统国家重点实验室基金资助项目(09ZD002)
关键词 扩展寄存器 多组结构 多核处理器 核间通信 LDPC译码器 extended register multi-bank architecture multi-core processor inter-core communication LDPC decoder
分类号 N945 [自然科学总论—系统科学]
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参考文献8

  • 1ARM Ltd.. The ARM Cortex-A9 Processors[EB/OL]. (2010- 11-21). http://www.arm.com/zh/products/processors/cortex-a/corte x-a9.php.
  • 2Rakesh N, Rohan G, Preeti R P. Customization of Register File Banking Architecture for Low Power[C]//Proc. of the 39th International Conference on VLSI Design. [S. 1.]: IEEE Press, 2007.
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  • 4Xiao Ruijin, Quan Heng, You Kaidi, et al. A Novel Multi-core Processor for Communication Applications[C]//Proc. of the 10th IEEE International Conference on Solid-state and Integrated Circuit Technology. [S. 1.]: IEEE Press, 2010.
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二级参考文献6

  • 1J6rg-Christian N, Porrmann M, Rtickert U. A Scalable Parallel SoC Architecture for Network Processors[C]//Proc. of IEEE Computer Society Annual Symposium on VLSI. Tampa, USA: IEEE Press, 2005.
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计算机工程
2012年 第15期

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