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三维芯片制造成本分析

Fabrication cost analysis of three-dimensional integrated circuits
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摘要 三维芯片由于其集成度高、功耗小、性能好等优点成为未来芯片制造的一种趋势,其制造成本问题成为该技术是否有应用前景的关键。分析了三维芯片的制造成本模型,并通过实验数据得到了三维芯片的成本最优划分方式;然后对多核处理器的二维芯片和三维芯片制造成本进行了对比,证明了在核数较大的情况下三维芯片制造成本的优势,说明三维芯片在未来芯片门数越来越多的情况下有很好的应用前景。 Merits of three-dimensional(3D) integration offers a technology that meets the requirements of the current trend in many-core processors.However,cost is always the dominant factor of adoption of this new technology.After it implemented introduction of a fabrication cost model which evaluated 2D,homogeneous 3D and heterogeneous 3D architectures in some designs.The fabrication costs of these designs and drawn a conclusion that when the number of gates was large,3D implementations were more and more cost-efficient than the 2D baseline with the increase of gates
出处 《计算机应用研究》 CSCD 北大核心 2012年第9期3292-3294,共3页 Application Research of Computers
基金 国家杰出青年科学基金资助项目(60788402)
关键词 三维芯片 成本分析 成本模型 three-dimensional integrated circuits cost analysis cost model
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参考文献7

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