摘要
在分析IIR滤波器结构的基础上,借助Mat lab完成一种基于FPGA的级联型IIR滤波器的设计与实现,同时设计并生成向量文件(.vec文件),在QuartusⅡ中完成向量文件的仿真。仿真结果表明文中设计的IIR滤波器能够高效完成滤波功能,同时通过向量文件的激励引入能够增强FPGA的仿真能力。
Based on an analysis of the structure of IIR filter and with the help of Matlab, we accomplished and fulfilled a design of cascade type IIR filter based on the FPGA(field programmable gate array). At the same time, we designed and produced the vector file (.vec file), and completed the simulation of vector file in Quartus II. The simulation showed that the design of IIR filter can filter more effidiently, and the simulation ability of FPGA can be enhanced through the stimulation of vector file.
出处
《时间频率学报》
CSCD
2012年第3期156-162,192,共8页
Journal of Time and Frequency
基金
中国科学院国家授时中心所创基金资助项目(Y002SC1301)