基于FPGA和UART的MCU总线数据采集系统设计

MCU data bus acquisition system design based on FPGA and UART

为了实现某生产线上MCU的数据采集,设计了一种基于FPGA和UART的数据采集系统,并完成系统的软硬件设计。整个设计完全采用硬件逻辑VHDL语言,集成在一枚Altera的cyclone芯片内,设计了单片机总线与FPGA接口逻辑,数据缓存的双端口RAM、FIFO和UART串行发送模块。通过仿真和实际应用证明系统的准确性,该方法和理念具有一定的通用性,为数据采集系统的设计提供了一个新思路,使系统更紧凑,易维护,更可靠。

In order to achieve the MCU data acquisition of one production line, this design based on FPGA and UART, including the hardware and software. The system is programed by VHDL, using a cyclone Ⅱ chip of the Altera. The system design the logic interface between FPGA and data bus, two-port RAM and a FIFO for the data caching and a UART send module. The simulation and practical application prove the accuracy of the design, The method has its versatility, Providing a new way for the data acquisition and making the system more compact, easy maintenance and more reliable.