未知雷达信号BFSN聚类分选算法的FPGA实现

Implementation of BFSN clustering algorithm for unknown radar signals by using FPGA

信号分选是雷达侦察系统中至关重要的环节,利用现场可编程逻辑门阵列(FPGA)实现雷达信号分选对系统速度和可靠性的提升具有重大影响,为此提出了一种非处理器架构并完全基于FPGA器件的广度优先搜索邻居(BFSN)聚类分选算法实现架构。在Xilinx公司的Virtex 5 FPGA上进行了硬件实现,并通过软件仿真与硬件测试对架构进行了实验验证。实验结果证实,该架构可对5部模拟雷达信号进行有效且快速的处理,证明了基于FPGA的雷达信号分选实现在工程上的可行性与高效性。

Signal separation is the key step in a radar reconnaissance system. Separating radar signals on Field Programmable Gate Array（FPGA） has significant impact on speed and reliability of a system. A new structure without any microprocessor is proposed based upon the Board First Search Neighbors（BFSN） clustering algorithm and being implemented on FPGA. An implementation on Xilinx Virtex 5 FPGA is performed and computer simulation and hardware testing experiment are executed. The results verify the capability of the proposed structure to handle the signals of 5 simulative radars, and certify the feasibility and high efficiency of radar signal separating method using FPGA.