一种高性能的低压CMOS带隙基准电压源的设计

Design of high performance voltage source with low voltage CMOS bandgap

提出一种新型的芯片内基准电压源的设计方案,基准电压源是当代数模混合集成电路以及射频集成电路中极为重要的组成部分。为满足大规模低压CMOS集成电路中高精度比较器、数模转换器、高灵敏RF等电路对基准电压源的苛刻需要,芯片内部基准电压源大部分采用基准带隙电压源。研究并设计了一种低功耗、超低温度系数和较高的电源抑制比的高性能低压CMOS带隙基准电压源。其综合了一级温度补偿、电流反馈技术、偏置电路温度补偿技术、RC相位裕度补偿技术。该电路采用台积电(TSMC)0.18μm工艺,并利用Specture进行仿真,仿真结果表明了该设计方案的合理性以及可行性,适用于在低电压下电源抑制比较高的低功耗领域应用。

This article proposed a new design of a chip benchmark power sourse, which is a very important component of mixed signal IC and RF integrated circuit. To meet the requirement of low voltage and large-scale integrated CMOS circuit of highprecision, the use of reference source is rigors for A/D and D/A converter, high sensitive RF circuits and so on. Most parts of the benchmark source employ benchmark bandgap voltage source on chip, so a low power consumption, low temperature coeffi- cient and high performance low pressure CMOS bandgap benchmark voltage source with higher PSRR is designed. It uses one level temperature compensation, current feedback technology, offset circuit temperature compensation technology and RC phase margin compensation technology. This circuit adopts the 0. 18 um process of TSMC, and uses the Specture to simulate. The simulation result verifies the feasibility and rationality of the design. The circuit can be uesd for low voltage and low power consumption with higher PSRR.