用于FPGA的多层次集成设计系统的设计与实现

Design and implementation of an integrated multi-level FPGA design system

针对当前现场可编程门阵列(field programmable gate array,FPGA)领域,电子设计自动化(electronic design automation,EDA)工具集成度不够高、不具备用户自主设计FPGA芯片的功能等问题,设计并实现一套完整的FPGA多层次集成设计系统(versatile design system,VDS).该系统包括高度集成的设计开发环境和FPGA芯片级到系统级的设计与验证工具,为设计、应用和验证自主研发的FPGA芯片提供了一个有效平台.VDS的显著特点在于提供了全自动芯片生成功能,使用户能根据自身需要灵活控制芯片的规模和功能,快速开发一系列的适应不同应用的FPGA.借助VDS成功设计出两款FPGA芯片,通过对FPGA进行电路设计以及对芯片和应用进行仿真与验证,证明了VDS的有效可行.

In modern FPGA-EDA design system, custom design of the FPGA chip is impossible due to inadequate tools. A complete FPGA multi-level integrated design system, versatile design system （VDS）, was developed. The VDS contains a highly integrated development environment, which includes design and verification tools for FPGA designs from the chip-level to the system-level. A VDS provides an efficient platform for FPGA design, verification and application development. A remarkable characteristic of VDS is that it supports fully automatic generation for the FPGA chip and allows users to flexibly control the chip＇s size and function according to their requirements. Finally, two FPGA chips were successfully designed by the VDS, and the experiment results of the design, simulation and verification have demostrated the efficiency of VDS.