UHF RFID读写器编解码模块的FPGA实现

FPGA Implementation of UHF RFID Reader Encoding/Decoding Module

本文首先对EPC C1G2协议中的相关内容作了简要介绍,对编解码系统的架构以及各个组成模块的FPGA实现作了重点说明,最后给出了Modelsim软件仿真结果,以及在读写器工作时使用Signaltap逻辑分析仪抓取的数据。

This paper first briefly introduces the EPC CIG2 protocol, and emphasizes the architecture of encoding/decoding system and FPGA implemation of all modules. At last, this paper gives simulation results of Modelsim software and data from Signaltap logical ana lyser when the reader is working.