摘要
在片上网络(Network on Chip,NoC)系统中,本地子系统通常基于总线结构,而全局通信则由基于包交换的网络构成。然而,由于总线和网络之间通讯机制的差异,当本地子系统内各核访问全局资源的时候,系统整体性能将下降。在3D NoC中,由于全局网络规模的扩大,该问题将越发显著。对此,该文提出一种基于统计时分复用(Statistical Time Division Multiplex,STDM)技术的3D NoC架构。该架构首先在本地子系统引入STMD控制单元,然后在网络接口设计中增加了计数及等待机制,并对路由节点针对STDM技术进行了优化设计,以增强对STDM的支持,减小总线、网络间的差异。同时,该文还充分利用STDM帧的特点,设计了一种新的数据包格式,以进一步降低全局通信的网络负荷。为证明新方案的高效,该文采用SystemC语言进行系统级建模,仿真结果表明:该方案在降低网络负荷、减小通信延时方面有着显著效果。最佳情况下,两者可以分别降低为传统方案的45%和20.5%。而实际应用中,尤其对于通信密集型应用而言,该方法的改善效果也同样明显。
In the system of Network on Chip (NoC), local systems normally adopt bus-based architectures while global networks use packet-based communications. However, since the natural difference between these two architectures is unavoidable, it introduces performance degradation to the overall system when cores in local systems visit global resources. And the situation will be worse in the enviroment of 3D NoC due to its larger network sizes. In this paper, a 3D NoC based on Statistical Time Division Multiplexing (STDM) is proposed. Firstly, a STDM controller is introduced into the local system. Then the network interface is designed using the mechanism of counting and waiting. Finally, the router is optimized for supporting the STDM better. And novel packet formats are designed to reduce the network load and improve the system performance further. In order to demonstrate the efficiency of the novel method, a systemC model is built on system level and experimental results show that the proposed method can reduce network load and transmission delay sharply. In the best condition, the improvement can reach 45% and 20.5% compared with the conventional one. And for real applications, especially for communication-intensive ones, the proposed architecture can also improve the performance a lot.
出处
《电子与信息学报》
EI
CSCD
北大核心
2012年第10期2501-2507,共7页
Journal of Electronics & Information Technology
基金
国家自然科学基金(60876017
61176024)
江苏省产学研前瞻性联合研究项目(BY2009146)
中央高校基本科研业务费专项资金(1095021031)
江苏省普通高校研究生科研创新计划(CX10B_021Z)资助课题
关键词
3D片上网络
统计时分复用
层次化存储架构
3D Network on Chip (3D NoC)
Statistical Time Division Multiplex (STDM)
Hierachical memoryarchitecture