摘要
MV12片上系统采用特许半导体0.35μm、2层多晶硅4层金属(2P4M)混合信号工艺,工作电压3.3 V,包含1个MV11控制器内核和2个MV10控制器内核,采用多核异构系统架构,整个系统由高级微控制器总线架构相连。提出一种采用中断实现片上系统(SoC)多核间通信的解决方法,给出了一个挂载在高级外围总线(APB)上的具有控制多核中断功能的中断控制模块,该模块能够接收来自通用输入输出(GPIO)的输入,并产生中断信号,同时也能够接收MV10程序执行完成之后所产生的中断信号。通过中断的方式可以简化异构多核之间的通信,保证了异构多核系统MV12的高效性。所设计的中断控制器,可以作为知识产权(IP)核,挂载在任何采用APB的片上系统上。
MV12 chip has been passed the silicon validation,based on Chartered 0.35 μm mixed-signal process with 2 poly silicon layers and 4 metal layers.MV12 is a multi-core heterogeneous embedded system on chip（SoC）,which contains one MV11 MCU and two MV10 MCUs,and the operating voltage is 3.3 V,mainly using in body control module.A method was proposed to achieve communication between multi-cores by interrupt.An interrupt controller module（ICM）was designed to manage the interrupt sources from general purpose input output（GPIO）,and MV10 can generate an interrupt pulse when data and commands were accessed between MV11 and MV10.So,the way of interrupt can simplify and improve the efficiency of communication between cores,and the high efficiency of the multi-core heterogeneous embedded system MV12 can be ensured.The ICM,as an intellectual property（IP）core,can be embedded on any advanced peripheral bus（APB）system from now on.
出处
《半导体技术》
CAS
CSCD
北大核心
2012年第10期755-759,785,共6页
Semiconductor Technology
基金
上海市科委集成电路设计专项(09706201300)
上海大学研究生创新基金(SHUCX112370)
关键词
MV12微处理器
中断
中断控制器
通用输入输出
片上系统
MV12 microprogrammed control unit（MCU）
interrupt
interrupt controller module（ICM）
general purpose input/output（GPIO）
system on chip（SoC）
