期刊文献+

多模态门电路自动合成算法的研究

The Research of Automatic Synthesis Algorithm For Designing Polymorphic Gate
下载PDF
导出
摘要 提出了一种全新的多模态门电路自动合成的方法,利用"图"这种数据结构来表示电路,并专门设计出一系列修改电路结构和参数的操作算子,最终成功地实现了多模态门电路的自动合成.实验表明该方法能够有效地自动合成各种多模态门电路. This characteristic enables polymorphic circuit can be widely applied to iault diagnosis ot digital circuit, synthesis of multifunctional digital circuit, etc. Polymorphic gate plays a vital role in the design of polymorphic circuit. However, until so far, there is no effective method for the synthesis of polymorphic gate. This paper proposes a new method for the synthesis of polymorphic gate, which use graph to represent circuit. The method specially designs a serial of operator to modify the circuit structure or parameter. Experiment results show that the method can synthesis various of polymorphic gate effectively.
作者 杨俊 甘朝晖
出处 《微电子学与计算机》 CSCD 北大核心 2012年第10期166-172,共7页 Microelectronics & Computer
基金 湖北省自然科学基金(2011CDC075)
关键词 多模态门电路 自动合成 图编码 克隆选择算法 polymorphic gates automatic synthesis ~ graph encode ~ clonal selection algorithm
  • 相关文献

参考文献19

  • 1Stoica A, Zebulum R S, Keyrneulen D. Polymorphie Electronics [C] // Proc of Inter-national Conference on Evolvable Systems: From Biology to Hardware ; To- kyo,Japan.. Springer-Verlag press, 2001, 291-302.
  • 2Stoica A , Zebulum R S , Keymeulen D, et al. On polymorphic circuits and their design using evolution- ary algorithms [C] // Proc of IASTED International Conference on Applied Informatics (AI2002). Inns- bruck Austria : IEEE, 2002.
  • 3Stoica A, Zebulum R S , Guo X , et al. Taking evo- lutionary circuit design from experimentation to imple- mentation., some useful techniques and a silicon dem- onstration [J] . Computers and Digital Techniques lEE Proceedings, 2004: 295-300.
  • 4Sekanina L. Evolutionary design of gate-level polymor- phic digital circuits[C] //Applications of Evolutionary Computation, Berlin, DE.- Springer, 2005:185-194.
  • 5Sekanina L, Starecek L, Gajda Z, et al. Evolution of multifunctional combinational modules controlled by power supply voltage[C] // Proc of thelst NASA/ ESA Conference on Adaptive Hardware ancl Systems. IEEE Computer Society Los Alamitos (2006) Press, 2006 : 186-193.
  • 6Sekanina L, Martinek T, Gaida Z. Extrinsic and in trinsic evolution of multifunctional combinational mod ules [J] . IEEE Congress on Evolutionary Computa tion, 2006 : 2771-2778.
  • 7Sekanina-L. Design and analysis of a new self-testing adder which utilizes polymorphic gates [J]. Design and Diagnostics of Electronic Circuits and Systems, 2007 : 1-4.
  • 8Ardakani H H, Mashayekhi M. New efficient scalable BIST full adder using polymorphic gates [J]. Quality Electronic Design , 2009.
  • 9Mashayekhi M, Ardakani H H, Omidian A. A new efficient scalable BIST full adder using polymorphic gates[J]. World Academy of Science, Engineering and Technology, 2010.
  • 10Sekanina L, Ruzicka R, Gajda Z. Polymorphic fiR Fil- ters with backup mode enabling power savings [C]// NASA/ESA Conference on Adaptive Hardware and Systems. 2009.

二级参考文献1

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部